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6.
MIXED-SIGNAL SIMULATIONS IN TIME-DOMAIN
This SARC Schematic Editor is also the entry point to insert continuous time modules in
the Napa mixed-signal simulator netlist. The same schematics can produce the C code
compatible to this simulator. The simulations are running in the time-domain together
with sampled domain sub-circuits like switched capacitor network and/or digital circuitry.
The technology behind the simulation is SARC (Semi-Analytical Recursive
Convolution) allowing to simulate linear and piece-wise linear circuits. A piece-
wise linear circuit is a linear circuit with a few percussions which change on the fly
the value of some elements while preserving strictly the flux of inductances and
the charges of capacitances.
Napa is a mixed-signal simulator, a teaser is available in the ‘NAPA Vineyard’ panel :
First, we will describe a non-inverting switched-capacitor integrator using the SARC
Schematic Editor. All switches are described as resistors with a symbolic value ‘phi1’ or
‘phi2’. During the simulations the value of these resistors will set to large or small. This
change of value is a percussion which will be handled properly by the SARC algorithm.
Symbolic values of components and ‘globals’ variables are set. The model includes
parasitic capacitances ad offset. We will add slew rate later.